The present invention relates generally to semiconductor devices and more particularly to a magnetic random access memory (MRAM) device.
Magnetic random access memory (MRAM) technology development is currently underway for use as a type of non-volatile memory (NVM) by the semiconductor industry. MRAM may also prove useful as dynamic random access memory (DRAM) or static random access memory (SRAM) replacements. There are two main types of MRAM: MTJ (magnetic tunnel junction) and GMR (giant magnetoresistive) MRAM. An MRAM array includes a write line or a bit line intersected by a number of digit lines. At each intersecting write line and digit line, a magnetic tunnel junction sandwich forms a memory element or bitcell in which one xe2x80x9cbitxe2x80x9d of information is stored. The magnetic tunnel junction sandwich is comprised of a thin insulating material between a magnetic layer of fixed magnetization vector and a magnetic layer in which the magnetization vector can be switched; these will be referred to as a fixed magnetic layer and a free (or switching) magnetic layer, respectively.
One problem with MRAM occurs when writing data to a single magnetic tunnel junction sandwich. Since the write line current travels through a plurality of MRAM bitcells, in order to apply enough current to write a selected MRAM bitcell at the intersection of the write line and digit line, adjacent MRAM bitcells are accidentally written, which may cause incorrect data storage. Therefore, a need exists to controllably write a single MRAM bitcell without accidentally writing adjacent MRAM bitcells.